1. Field of the Invention
The invention relates to a semiconductor device and a method of fabricating the same, and more particularly to a semiconductor device including a semiconductor substrate on which a high-frequency electronic circuit is integrated, a ground electrode formed on the semiconductor substrate, and a boding wire grounding the ground electrode therethrough, and a method of fabricating such a semiconductor device.
2. Description of the Related Art
In a high-frequency device, it is quite important to enhance noise characteristic of the device by reducing noises caused by a resistance of a substrate on which an integrated circuit is formed. To this end, a high-frequency device is often designed to include a low-resistive layer below a pad electrode with an interlayer insulating film being sandwiched therebetween. For instance, such a low-resistive layer is composed of silicide.
One of such a high-frequency device is disclosed in xe2x80x9cBonding pad models for silicon VLSI technologies and their effects on the Noise Figure of RF NPNsxe2x80x9d, IEEE MTT-S Digest, 1994, pp. 1179-1182.
FIG. 1A is a cross-sectional view of the high-frequency device disclosed in the above-mentioned digest.
The illustrated device is comprised of a silicon substrate 101 lying on a ground 120, a polysilicon silicide layer 108 formed on the silicon substrate 101, an interlayer insulating film 113 formed on both the silicon substrate 101 and the polysilicon silicide layer 108, a pad electrode 115a formed on the interlay insulating film 113, and a bonding wire 119 electrically connecting the polysilicon silicide layer 108 to the ground 120.
In the illustrated device, since the polysilicon silicide layer 108 is directly grounded through the bonding wire 119, it would be possible to prevent the device from being influenced by noises caused by a resistance of the silicon substrate 101.
However, the device illustrated in FIG. 1A is accompanied with the following problem.
FIG. 1B is a circuit diagram of a circuit equivalent to the device illustrated in FIG. 1A. That is, the device is equivalent to the circuit including a parasitic capacitor Cp in the pad electrode 115a, a resistance Rp in the silicon substrate 110, grounded at one end and electrically connected at the other end in series with the capacitor Cp, and an inductance Lb in the bonding wire 119, grounded at one end and electrically connected at the other end in series with the capacitor Cp, but in parallel with the resistance Rp.
As an operating frequency of the circuit becomes greater, an impedance xcfx89 Lb of the inductance Lb in the bonding wire 119 becomes unignorable. As a result, a current Ip running through the parasitic capacitor Cp of the pad electrode 115a runs also through the resistance Rp of the silicon substrate 101. Herein, the current Ip runs through the resistance Rp at a rate K defined by the following equation.
K=100xc3x97xcfx89Lb/(Rp2+(xcfx89Lb)2)1/2
For instance, if the resistance Rp is equal to 150 xcexa9, a frequency f is equal to 5 GHz, and the inductance Lb is equal to 10 nH, the rate K is 90%. This means that almost all of the current Ip runs through the resistance Rp. As a result, the noise characteristic of the device is deteriorated due to noises caused by the resistance Rp of the silicon substrate 101.
The device illustrated in FIG. 1A is accompanied with another problem as follows.
Electric power W consumed by the resistance Rp is defined as follows.
W=Rpxc3x97(K|Ip|/100)2
Hence, as the rate K is increased, the electric power W consumed by the resistance Rp is also increased. Thus, power consumption in the device is increased.
Japanese Unexamined Patent Publication No. 7-120788 has suggested a semiconductor device a semiconductor substrate, a semiconductor active element formed on the semiconductor substrate, a power line through which electric power is supplied to the semiconductor active element, an electrode defining a capacity, and a dielectric substance defining a capacity. A reference voltage is applied to the electrode. At least a part of the electrode is designed to face the power line. The dielectric substance is positioned between the power line and the electrode.
Japanese Unexamined Patent Publication No. 8-102525 has suggested a semiconductor integrated circuit including (a) a plurality of circuit blocks each comprised of MISFET, a resistance of a wiring through which electric power is supplied is divided into sections so that a resistance in each of the sections can be ignored, (b) a plurality of first capacities each associated with each of the circuit blocks, each of the first capacities having a capacity sufficiently greater than a capacity of the associated circuit block, and (c) a second capacity positioned between external terminals, the second capacity having a capacity greater than a total capacity of the first capacities.
Japanese Unexamined Patent Publication No. 10-326868 has suggested a semiconductor device including a semiconductor integrated circuit device having a capacitor and a resistance which cooperate with each other to define a high-frequency noise cutting circuit. The high-frequency noise cutting circuit reduces static electricity noises generated in a signal line through which a clock signal is transmitted.
However, the problems of deterioration in the noise characteristics of the device and an increase in power consumption remain unsolved even in the semiconductor devices suggested in the above-mentioned Publications.
In view of the above-mentioned problems in the conventional semiconductor devices, it is an object of the present invention to provide a semiconductor device which is capable of enhancing noise characteristics and reducing power consumption.
It is also an object of the present invention to provide a method of fabricating such a semiconductor device as mentioned above.
In one aspect of the present invention, there is provided a semiconductor device including (a) a semiconductor substrate on which an integrated circuit is formed, (b) a ground electrode formed on the semiconductor substrate, (c) a bonding wire through which the ground electrode is grounded, the bonding wire having an inductance, and (d) a capacitor positioned in series with the inductance, the capacitor and the inductance cooperating with each other to form a resonance circuit at an operating frequency of the integrated circuit.
It is preferable that the capacitor is comprised of (d1) a lower electrode formed on or above the semiconductor substrate, (d2) an insulating film covering the lower electrode therewith, and (d3) an upper electrode formed on the insulating film above the lower electrode.
It is preferable that the lower electrode is comprised of a low-resistive layer formed on the semiconductor substrate.
For instance, the low-resistive layer is composed of silicide.
It is preferable that the operating frequency F is defined by the following equation,
F=(1/2 xcfx80)xc3x97(1/(Lbxc3x97C1))1/2, 
wherein Lb indicates an inductance of the bonding wire, and Cl indicates a capacity of the capacitor.
There is further provided a semiconductor device including (a) a semiconductor substrate on which an integrated circuit is formed, (b) a ground electrode formed on the semiconductor substrate, (c) a bonding wire through which the ground electrode is grounded, the bonding wire having a first inductance, (d) a capacitor positioned in series with the first inductance, (e) an inductor having a second inductance, the inductor positioned in parallel with the capacitor, the capacitor, the first inductance and the second inductance cooperating with one another to form a resonance circuit at an operating frequency of the integrated circuit.
It is preferable that the capacitor is comprised of (d1) a lower electrode formed on or above the semiconductor substrate, (d2) an insulating film covering the lower electrode therewith, and (d3) an upper electrode formed on the insulating film above the lower electrode.
It is preferable that the lower electrode is comprised of a low-resistive layer formed on the semiconductor substrate. For instance, the low-resistive layer is composed of silicide.
It is preferable that the inductor is comprised of a wiring layer formed above the semiconductor substrate.
It is preferable that the wiring layer is formed just above the lower electrode.
It is preferable that the inductor is comprised of a wiring layer formed just above the low-resistive layer.
It is preferable that the semiconductor device further includes a current stopper formed in the lower electrode, the current stopper preventing generation of an eddy current caused by the second inductance.
It is preferable that the semiconductor device further includes a current stopper formed in the low-resistive layer, the current stopper preventing generation of an eddy current caused by the second inductance.
It is preferable that the current stopper is comprised of at least one cut-out formed in the lower electrode. As an alternative, the current stopper may be comprised of at least one cut-out formed in the low-resistive layer.
It is preferable that the current stopper is comprised of four cut-outs, two of them extending in a first direction and the remaining two of them extending in a second direction perpendicular to the first direction.
It is preferable that each of the four cut-outs inwardly extends from each of four edges of the low-resistive layer.
It is preferable that the operating frequency F is defined by the following equation, F=(1/2 xcfx80)xc3x97((Lb+L1)/(C1xc3x97Lbxc3x97L1))1/2 , wherein Lb indicates an inductance of the bonding wire, L1 indicates an inductance of the inductor, and C1 indicates a capacity of the capacitor.
It is preferable that the cut-out is filled with insulator.
The advantages obtained by the aforementioned present invention will be described hereinbelow.
In accordance with the present invention, there is defined a resonance circuit comprising an inductance of the bonding wire positioned in parallel with a resistance of the semiconductor substrate, and a capacitor electrically connected in series to the inductance. As an alternative, there is defined a resonance circuit comprising a first inductance of the bonding wire positioned in parallel with a resistance of the semiconductor substrate, a capacitor electrically connected in series to the first inductance, and a second inductance electrically connected in parallel with the capacitor. A high-frequency current runs through the resonance circuit. Accordingly, a high-frequency current no longer runs through the resistance of the semiconductor substrate. This ensures enhancement in noise characteristic of the device and reduction in power consumption in the device.
The above and other objects and advantageous features of the present invention will be made apparent from the following description made with reference to the accompanying drawings, in which like reference characters designate the same or similar parts throughout the drawings.